Security Cleared (SC) FPGA Design Engineer

Location
Stevenage, Hertfordshire
Salary
up to £40 per hour
Posted
26 Oct 2020
Closes
23 Nov 2020
Ref
FPGA
Clearance Level
SC
Job Type
Contract

We are seeking experienced Security Cleared (SC) FPGA Design Engineer who is required to perform complex design tasks within the communication processors group. (no shift work or travel, 37 hours per week).

Key responsibilities:

  • Design of complex FPGA designs to satisfy the projects requirements
  • Detailed RTL design in VHDL for a high reliability space design.
  • verification of the RTL design and documenting the verification that was performed

Essential skills and experience:

Essential: FPGA VHDL design experience

  • Experience in digital FPGA design

Desirable

  • Experience of Mentor Graphics Questa
  • Flight Design experience for space

Due to the nature of the role, the successful candidate will have a valid SC Clearance prior start.

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