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FPGA Engineer

Employer
Sanderson Government & Defence
Location
Worcestershire
Salary
£350 - £425 per day
Closing date
9 Apr 2019

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Clearance Level
SC
Sector
Defence
Job Type
Contract

FPGA Engineer

Duration: 6 months initial

Rate: £350 to £425 per day

IR35: Outside

Clearance: SC or SC eligible

Location: Worcestershire

Key Accountabilities:

  • Contribute to all stages in the specification, design, development, integration, test and certification, fielding and support of navigation and cryptographic devices, following a rigorous engineering lifecycle
  • Specify and develop FPGA/ASIC solutions
  • Interact with other engineers working in multi-disciplinary teams to deliver products and customer solutions
  • Responsible to Project Design Authority for all firmware related activities
  • Plans/structures work effectively, including breaking down problems into manageable work packages
  • Ability to accurately cost work and manage risk
  • Produces written documentation (including presentation material) of technical work in accordance with Project requirements
  • Rapid learning of current military-specific and civil secure technologies in support of research and products
  • Innovation in the application/integration of digital hardware technologies to build novel secure systems

Essential Knowledge, Skills and Experience Required:

  • Ability to write and debug VHDL
  • Experience designing and implementing complex firmware solutions in CPLD and FPGA using ModelSim, Synplify, ISE
  • Experience of design and implementation of high-speed of digital processing solutions and systems in FPGA e.g. system-on-chip, embedded processors, high speed interfaces
  • Experience of working in a rigorous engineering environment using configuration management and change management processes/tools
  • Ability to prepare and undertake test and verification of FPGA/ASIC

Desirable Experience:

  • Experience of GNSS, Galileo security chain and/or PRS receivers
  • Knowledge of RF and radio signal performance/propagation issues
  • Knowledge/experience and knowledge of crypto security design including crypto algorithms, anti-tamper technologies etc.
  • Experience of specifying, designing, verifying and testing ASICs
  • Ability to engineer software to support system development/testing in appropriate languages including C++, C and assembly language
  • Experience using Mentor Graphics DxDesigner and Expedition PCB
  • Experience of using DOORS
  • Ability to use supporting tools such as MatLab for solution modelling and verification

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