PCB Technologies Engineer

Competitive hourly rate
15 May 2018
12 Jun 2018
Dale Williams
Clearance Level
Job Type

PCB Technologies Engineer required undertaking the below responsibilities:

Provide assembly technology advice and support for circuit card assembly

Provide process knowledge and advice for surface mount assembly and other soldering processes

Propose board technology and structure for a PCB layout designer to use after consultation with PCB fabricators, particularly for circuit designs requiring controlled impedance.

Assess mechanical design concepts for practicality of electrical routing & conformance to PCB design rules.

Resolve conflicts within rules set and conflicts between rules and the circuit design requirements that the PCB layout designer, PCB fabricator or board assembler may encounter.

Provide mechanical and thermal property data of PCBs to Mechanical Engineering.

Based on adjudged level of risk, conduct mechanical vibration/shock & thermal assessments of boards.

Provide specialist advice and support across projects and to other functions as appropriate

The contract is for 6 months initially (on-going thereafter) with a competitive hourly rate offered.

General activities will include:

Working effectively in collaboration with mechanical & electronic designers, PCB layout group, PCB fabricators & manufacturing (board assembly)

Being able to clearly communicate to mechanical & electronic designers any PCB limitations associated with their initial proposals and influencing the adoption of alternative solutions

Working to tight or critical timescales, identifying and addressing critical aspects as a priority

Production / process engineering background.

This position also requires:

Knowledge of the various PCB technologies and their advantages/disadvantages.

Good knowledge of PCB and Circuit Card Assembly processes.

Good knowledge of applicable industry standards (e.g. relevant IPC's).

Good appreciation of PCB Layout processes and tools.

Good appreciation of the effects of environments on electronic equipment (e.g. Vibration, thermal...)

Candidates must be willing to undergo the security vetting procedure.

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